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New Logic Test - 7419 Vector Table

Enclosed is the new layout to be added to the logic tests.
The test was performed on the M74LS19P (hex Schmitt-Trigger inverters) chip from Mitsubishi.

7419 - Logic Vector.jpg (214.83 KB)

7419 - Logic Vector.jpg

7419 - Logic Test.jpg (257.78 KB)

7419 - Logic Test.jpg

M74LS19P.jpg (315.72 KB)

M74LS19P.jpg

SN74LS19A, SN74LS24A.pdf (1.12 MB)

7419.lgc (2.11 KB)

回复 3# yovish

Yes, it is a lot of work to perform all the combined tests. Generally,  only the logic combination test of nearby pins is required..

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It would be best to test all possible combinations of inputs and outputs on 6 gates (2^6=64), but I thought that's what you wanted, example of similar tests: 4009, 4069, 4584, 7404, 7405*, 7406*, 7414, 7416...
Creating tests with lots of lines is a pain in this release and you ignore various suggestions for improving the software ...
I am a supporter of full tests, but it seemed to me that it is about initial tests of the logic of the integrated circuit, and everyone can write exact and more precise tests by themselves.
Yes, otherwise I am attaching a full test of the 7419 (it can also be used for other integrated circuits of the same design)...

7419 (Full test) - Logic Vector.jpg (643.65 KB)

7419 (Full test) - Logic Vector.jpg

7419 (Full test) - Logic Test.jpg (302 KB)

7419 (Full test) - Logic Test.jpg

7419 (Full test).lgc (3.56 KB)

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回复 1# yovish

Thank you for your hard work.
It is recommended to add more vector test lines to detect short circuits between two adjacent logic cells.
As shown below:
阿里旺旺图片20210522092912.jpg

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