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标题: Problem programming ATF750C [打印本页]

作者: Harlon    时间: 2022-1-2 01:00     标题: Problem programming ATF750C

I'm trying to use the t56 to program my ATF750C DIP24 chips as 10 bit counters, but the logic for registers on pin 14 to 18 wil not program correctly, is there a bug in the algorithm for ATF750C chips? Attached are the sourcecode from WinCUPL and the generated .jed file.
COUNTER.rar (4.59 KB)

附件: COUNTER.rar (2022-1-2 00:48, 4.59 KB) / 下载次数 3407
作者: admin    时间: 2022-1-4 10:26

回复 1# Harlon

Use the correct JEDEC format file:

2022-1-4 10:26

图片附件: ATF750C.jpg (2022-1-4 10:26, 166.63 KB) / 下载次数 1563

作者: Harlon    时间: 2022-1-5 06:18

My chips are ATF750C-10PU, I generate JEDEC file for ATF750C (V750C in WinCUPL) (14504 fuses), and select ATF750C in Xgpro. I have tried many variations with generating JEDEC files for V750 and V750B and trying to program with the cross-programming options, but get eighter the same result or no working chip. test case.rar (4.97 KB)

I have made a new test case where each output pin (23 to 14) is toggled on clock pin 1 when pin 13 is low, or loaded with value from input (pin 2 to 11) when pin 13 is high. All outputs toggles correctly when pin 13 is low, but pin 18 to 14 allways loads low when pin 13 is high, even when all inpit pins are set high.

附件: test case.rar (2022-1-5 06:17, 4.97 KB) / 下载次数 3388
作者: admin    时间: 2022-1-5 09:45

回复 3# Harlon
your JEDEC file only 14496 fuse .

try : chang 14499 14500  fuse into  0 0   after load jed file. then Programming it.

2022-1-5 10:00

图片附件: 666.jpg (2022-1-5 10:00, 38.68 KB) / 下载次数 1524

作者: Harlon    时间: 2022-1-5 23:08

the last row of fuses (14496 to 14504) are all 0 and therefore not defined in the file, but the file seems to be defined for 14504 fuses with "*QF14504" on line 15. They are however all loaded as 0 in Xgpro. If i compile for input pin keeper (V750CPPK) fuse 14501 is set to 1 and has correct effect on the chip after programming (keeping input states), but no improvements on the logic for the flipflops.
作者: admin    时间: 2022-1-6 09:27

回复 5# Harlon

   I checked the software and the position of each fuse bit . no errors found.

   only found a bug . reading is disable now.
  Programming/Erase/Verifying are all normal.
I tested it with PLCC28, I will check it agian after get a DIP24 chip.
作者: Harlon    时间: 2022-1-18 03:29

Do you have an estimation for when you wil have the dip24 chips to test? Allso, did you test the functionality of the chip after programming? My chips verifies correctly, but does not work when tested in breadboard.
作者: admin    时间: 2022-1-18 12:05

回复 7# Harlon

   The problem has been found and is being fixed. will upgrade within 2 days
作者: Harlon    时间: 2022-1-18 18:06

Reply 8# admin

    Thank you so much

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