标题: New Logic Test - 74256 Vector Table [打印本页] 作者: yovish 时间: 2021-10-22 01:44 标题: New Logic Test - 74256 Vector Table
Enclosed is the new layout to be added to the logic tests.
The test was performed on the 74LS256N (dual 4-bit addressable latch) chip from Signetics and SN74LS256N chip from Motorola.