标题: New Logic Test - 4060 Vector Table [打印本页] 作者: yovish 时间: 2021-5-23 20:47 标题: New Logic Test - 4060 Vector Table
Enclosed is the new layout to be added to the logic tests.
The test was performed on the 74HCT4060N (CMOS 14-Stage Ripple Carry Binary Counter/Divider and Oscillator) chip from Philips.
P.S.
4060 is a 14-bit counter, so it counts up to 16383 (2 ^ 14-1). To check this counter well, it would be nice to add a multiple pulse. There are more integrated circuits that would be easier to test in this way.
In the 4060 IC, I could only overload a small part of the functionality because I hit the limit of the number of lines (512) in the logic vector!
图片附件: 4060 - Logic Vector - MAX Vector Line must be less than 512!.jpg (2021-5-23 20:45, 353.73 KB) / 下载次数 13303 http://forums.xgecu.com/attachment.php?aid=582&k=56dfc256d0178287f8d3acfceb8a2342&t=1732300084&sid=ULxBM3