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标题: New Logic Test - 74642 Vector Table [打印本页]

作者: yovish 时间: 2021-4-22 04:08 标题: New Logic Test - 74642 Vector Table

Enclosed is the new layout to be added to the logic tests.
The test was performed on the 74LS642-1N (invert. octal bus transceiver with 3-state comp. out, open collector) chip from Signetics.

图片附件: 74642 - Logic Vector.jpg (2021-4-22 04:07, 273.38 KB) / 下载次数 12412
http://forums.xgecu.com/attachment.php?aid=457&k=dff4f908dead6963ca0d91d26c08a437&t=1772480751&sid=UM6zKd

图片附件: 74642 - Logic Test.jpg (2021-4-22 04:07, 242.22 KB) / 下载次数 12054
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图片附件: 74LS642-1N.jpg (2021-4-22 04:07, 196.02 KB) / 下载次数 11915
http://forums.xgecu.com/attachment.php?aid=459&k=024caf9fb2f5e55e492e4ba512627735&t=1772480751&sid=UM6zKd

附件: 74LS640, 641, 642 i 645.pdf (2021-4-22 04:07, 122.47 KB) / 下载次数 10791
http://forums.xgecu.com/attachment.php?aid=460&k=2eb7458079899f71cdf90496fe419e06&t=1772480751&sid=UM6zKd

附件: 74642.lgc (2021-4-22 04:08, 2.18 KB) / 下载次数 50121
http://forums.xgecu.com/attachment.php?aid=461&k=f62811451cfc935ba2a1ba44ec1a56b2&t=1772480751&sid=UM6zKd

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