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标题: New Logic Test - 74642 Vector Table [打印本页]

作者: yovish 时间: 2021-4-22 04:08 标题: New Logic Test - 74642 Vector Table

Enclosed is the new layout to be added to the logic tests.
The test was performed on the 74LS642-1N (invert. octal bus transceiver with 3-state comp. out, open collector) chip from Signetics.

图片附件: 74642 - Logic Vector.jpg (2021-4-22 04:07, 273.38 KB) / 下载次数 12414
http://forums.xgecu.com/attachment.php?aid=457&k=2282eeaa680388dbfb36c532fab24ff1&t=1772487878&sid=1mFWEV

图片附件: 74642 - Logic Test.jpg (2021-4-22 04:07, 242.22 KB) / 下载次数 12056
http://forums.xgecu.com/attachment.php?aid=458&k=ffd9e9baef14ab50bf7dbcbbd0259e12&t=1772487878&sid=1mFWEV

图片附件: 74LS642-1N.jpg (2021-4-22 04:07, 196.02 KB) / 下载次数 11918
http://forums.xgecu.com/attachment.php?aid=459&k=acee93a32d2d72f3d45abe7ad45d315d&t=1772487878&sid=1mFWEV

附件: 74LS640, 641, 642 i 645.pdf (2021-4-22 04:07, 122.47 KB) / 下载次数 10793
http://forums.xgecu.com/attachment.php?aid=460&k=71d2ff785eb82f4d98ad75062f71af83&t=1772487878&sid=1mFWEV

附件: 74642.lgc (2021-4-22 04:08, 2.18 KB) / 下载次数 50129
http://forums.xgecu.com/attachment.php?aid=461&k=56f0a507a990608ea70ee9e6180b05af&t=1772487878&sid=1mFWEV

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