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标题: New Logic Test - 74642 Vector Table [打印本页]

作者: yovish 时间: 2021-4-22 04:08 标题: New Logic Test - 74642 Vector Table

Enclosed is the new layout to be added to the logic tests.
The test was performed on the 74LS642-1N (invert. octal bus transceiver with 3-state comp. out, open collector) chip from Signetics.

图片附件: 74642 - Logic Vector.jpg (2021-4-22 04:07, 273.38 KB) / 下载次数 12417
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图片附件: 74642 - Logic Test.jpg (2021-4-22 04:07, 242.22 KB) / 下载次数 12062
http://forums.xgecu.com/attachment.php?aid=458&k=65bde40f2fae73a78c5f2b9ff74c8ac0&t=1772497550&sid=vjYMNa

图片附件: 74LS642-1N.jpg (2021-4-22 04:07, 196.02 KB) / 下载次数 11920
http://forums.xgecu.com/attachment.php?aid=459&k=2c764b5fe720890e26c87565862a7aae&t=1772497550&sid=vjYMNa

附件: 74LS640, 641, 642 i 645.pdf (2021-4-22 04:07, 122.47 KB) / 下载次数 10796
http://forums.xgecu.com/attachment.php?aid=460&k=512d8e60c27fb1eea9e87134add89e98&t=1772497550&sid=vjYMNa

附件: 74642.lgc (2021-4-22 04:08, 2.18 KB) / 下载次数 50138
http://forums.xgecu.com/attachment.php?aid=461&k=51a5c09e03980f5c83adea9a853baf59&t=1772497550&sid=vjYMNa

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