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yovish 发表于 2021-5-22 04:05

New Logic Test - 7419 Vector Table

Enclosed is the new layout to be added to the logic tests.
The test was performed on the M74LS19P (hex Schmitt-Trigger inverters) chip from Mitsubishi.

admin 发表于 2021-5-22 09:22

[b]回复 [url=http://forums.xgecu.com/redirect.php?goto=findpost&pid=739&ptid=262]1#[/url] [i]yovish[/i] [/b]

Thank you for your hard work.
It is recommended to add more vector test lines to detect short circuits between two adjacent logic cells.
As shown below:
[attach]568[/attach]

yovish 发表于 2021-5-22 19:04

It would be best to test all possible combinations of inputs and outputs on 6 gates [size=12px](2^6=64), but I thought that's what you wanted, example of similar tests: 4009, 4069, [/size][size=12px]4584, 7404, 7405*, 7406*, 7414, 7416...[/size]
Creating tests with lots of lines is a pain in this release and you ignore various [size=12px]suggestions for improving the software ...[/size]
I am a supporter of full tests, but it seemed to me that it is about initial tests of the [size=12px]logic of the integrated circuit, and everyone can write exact and more precise tests by [/size][size=12px]themselves.[/size]
Yes, otherwise I am attaching a full test of the 7419 (it can also be used for other [size=12px]integrated circuits of the same design)... [/size]

admin 发表于 2021-5-23 10:04

[b]回复 [url=http://forums.xgecu.com/redirect.php?goto=findpost&pid=744&ptid=262]3#[/url] [i]yovish[/i] [/b]

Yes, it is a lot of work to perform all the combined tests. Generally,  only the logic combination test of nearby pins is required..

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